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Studying the Influence of Chip Temperatures on Timing Integrity Using Improved Power Modeling

Timár, András; Kerecsen Istvánné Rencz, Márta (2011)

Electro-thermal co-simulation of ICs with runtime back-annotation capability

Timár, András; Bognár, György; Poppe, András; Kerecsen Istvánné Rencz, Márta (EDA Publishing, 2010)

Studying the influence of chip temperatures on timing integrity

Timár, András; Kerecsen Istvánné Rencz, Márta (IEEE Press, 2011)

Issues in junction-to-case thermal characterization of power packages with large surface area

Vass-Várnai, András; Shan Gao; Sárkány, Zoltán; Jongman Kim; Seogmoon Choi; Farkas, Gábor; Poppe, András; Kerecsen Istvánné Rencz, Márta (IEEE Press, 2010)

New simulation approaches supporting temperature-aware design of digital ICs

Nagy, Gergely; Timár, András; Szalai, Albin; Kerecsen Istvánné Rencz, Márta; Poppe, András (IEEE, 2012)

Characterization method for thermal interface materials imitating an in-situ environment

Vass-Várnai, András; Sárkány, Zoltán; Kerecsen Istvánné Rencz, Márta (2012)

Measurement Based Compact Thermal Model Creation - Accurate Approach to Neglect Inaccurate TIM Conductivity Data

Vass-Várnai, András; Robin Bornoff; Sárkány, Zoltán; Ress, Sándor László; Kerecsen Istvánné Rencz, Márta (IEEE Press, 2011)

A Novel Approach of Logi-thermal Simulation Methodology and Implementation for ASIC Designs

Timár, András; Poppe, András; Kerecsen Istvánné Rencz, Márta (IEEE Press, 2010)

Electro-thermal Co-simulation of ICs with Runtime Back-annotation Capability

Timár, András; Bognár, György; Poppe, András; Kerecsen Istvánné Rencz, Márta (2010)

Real-time heating and power characterization of cells in standard cell designs

Timár, András; Kerecsen Istvánné Rencz, Márta (2013)