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Studying the Influence of Chip Temperatures on Timing Integrity Using Improved Power Modeling 

Timár, András; Kerecsen Istvánné Rencz, Márta (2011)
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Electro-thermal co-simulation of ICs with runtime back-annotation capability 

Timár, András; Bognár, György; Poppe, András; Kerecsen Istvánné Rencz, Márta (EDA Publishing, 2010)
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Studying the influence of chip temperatures on timing integrity 

Timár, András; Kerecsen Istvánné Rencz, Márta (IEEE Press, 2011)
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New simulation approaches supporting temperature-aware design of digital ICs 

Nagy, Gergely; Timár, András; Szalai, Albin; Kerecsen Istvánné Rencz, Márta; Poppe, András (IEEE, 2012)
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A Novel Approach of Logi-thermal Simulation Methodology and Implementation for ASIC Designs 

Timár, András; Poppe, András; Kerecsen Istvánné Rencz, Márta (IEEE Press, 2010)
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Electro-thermal Co-simulation of ICs with Runtime Back-annotation Capability 

Timár, András; Bognár, György; Poppe, András; Kerecsen Istvánné Rencz, Márta (2010)
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Real-time heating and power characterization of cells in standard cell designs 

Timár, András; Kerecsen Istvánné Rencz, Márta (2013)
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Acquiring real-time heating of cells in standard cell designs 

Timár, András; Kerecsen Istvánné Rencz, Márta (2012)
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High Resolution Temperature Dependent Timing Model in Digital Standard Cell Designs 

Timár, András; Kerecsen Istvánné Rencz, Márta (2013)
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Logi-thermal simulation using high-resolution temperature dependent delay models 

Timár, András; Kerecsen Istvánné Rencz, Márta (Brandenburgische Technische Universität Cottbus, 2013)
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Kerecsen Istvánné Rencz, Márta (12)
Timár, András (12)
Poppe, András (4)Bognár, György (3)Nagy, Gergely (1)Szalai, Albin (1)Date Issued2010 (3)2011 (3)2012 (3)2013 (3)Has File(s)Yes (12)

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